EDN

New simulation capabilities advance SystemVerilog

Santa Cruz, Calif. — Two verification providers — Mentor Graphics Corp. and Axiom Design Automation — are claiming new simulation technology this week that offers broad support for the emerging ...
EDN

Who is the EDA leader in SystemVerilog simulation? Part 2

Gary Smith has started his own research firm GarySmithEDA. Gary said he’ll soon release his marketshare numbers. But there’s a problem: Gary’s report currently covers SystemVerilog under “mixed ...
Electronics For You

NGSPICE: A Design Engineer’s First Step Into Circuit Simulation

Discover how this powerful open-source SPICE simulator helps you analyse and validate analog, digital and mixed-signal ...
Electronic Design

Simulator Adds Assertion IP And Native SystemVerilog Support

The latest release of the VCS verification environment sports new capabilities that help users find more bugs more quickly, with up to a fivefold increase in verification speed (see the figure). Key ...
MacTech

CVC Verilog Simulator now supports Mac OS X

Pragmatic C Software Corp. (http://www.pragmatic-c.com) has released CVC, a Verilog 2005 simulator for the Mac OS X platform. It’s been ported to the X86 Mac OS X ...
Design-Reuse

Synopsys VCS Verilog Simulator Incorporates Breakthrough Verification Capabilities

MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Sept. 26, 2001-- Synopsys, Inc. (Nasdaq:SNPS), the technology leader for complex IC design, today announced VCS(TM) 6.0.1, the latest release of the industry's ...
Business Insider

Metrics, R&D-Stage Startup Montana Announce Intention to MergeMetrics Simulator, Unique Montana Approach with System Verilog Processing Unit Bridge Gap between Simulation and ...

OTTAWA, June 25, 2018 (GLOBE NEWSWIRE) -- Metrics Technologies, the trailblazing cloud-based simulation and verification management solutions provider leveraging Google Cloud, and R&D-stage startup ...
Electronic Design

Mixed-Signal Simulator Speaks Verilog-AMS

Designers today find themselves adding more and more analog and mixed-signal content to their creations. And at nanometer geometries and gigabit speeds, digital circuits begin to look more analog than ...
Business Wire

Avery Design Debuts QEMU Virtual Host to SystemVerilog PCIe VIP HW-SW Co-simulation Solution for Pre-silicon System-level Simulation of NVMe SSD and PCIe Designs

TEWKSBURY, Mass.--(BUSINESS WIRE)--Avery Design Systems, leader in functional verification solutions today announced the pre-silicon system simulation solution of NVMe TM SSD and PCIe® designs using ...
Design-Reuse

Fintronic's SuperFinSim Verilog Simulator accelerated through tight integration with Novas Debussy Debug System

FOSTER CITY, Calif.-- July 18, 2003--Fintronic USA, Inc., a leading provider of high-performance Verilog simulators announced the release of an API-based interface between Super FinSim? and the ...