Semiconductor Engineering

FPGA-Proven RISC-V System With Hardware Accelerated Task Scheduling

A technical paper titled “Enabling HW-based Task Scheduling in Large Multicore Architectures” was published by researchers at Barcelona Supercomputing Center, University of Campinas, University of Sao ...
Semiconductor Engineering

Heterogeneous Multi-Core HW Architectures With Fine-Grained Scheduling of Layer-Fused DNNs

A technical paper titled “Towards Heterogeneous Multi-core Accelerators Exploiting Fine-grained Scheduling of Layer-Fused Deep Neural Networks” was published by researchers at KU Leuven and TU Munich.
EDN

Slack scheduling enhances multicore performance in safety-critical applications

Designers optimize multicore processors foraverage-case execution time, often at theexpense of worst-case, or longest, executiontimes. This trade-off presents significantchallenges to developers of ...
EDN

Function pointers, Part 2: Task scheduling

One of the most common applications for using function pointers is in task schedulers. Every embedded system contains some type of task scheduler whether it is a simple round robin loop or a state of ...