Mar 17, 2025 · This article describe i.M93 RGMII to PHY connection, delay adding tips. i.MX93 don't support delay in both FEC and QOS port in i.MX93 side. It also provide solution on i.MX93 how to …

Nov 8, 2024 · Good Morning, I have an issue with the S32K388 on the RMII interface of a custom board. The S32K388 is setup as the MAC and is connected to a PHY. The issue is related with 50MHz …

Dec 6, 2023 · Hello, I want to connect two IMX8 mini cpu over ethernet RGMII Interface not using external PHY. How can I do ? Which pin do I connect between IMX8 ? What do I write my linux …

Feb 27, 2025 · Hi, We are using DART-MX8M-PLUS development kit, along with our custom board based on iMX8MP. In order to use ADC connected on i2c5 bus, we need pins that are originally used …

Dec 4, 2020 · Both ENET0 and ENET1 support RGMII at 1.8 V and 2.5 V, and RMII at 3.3 V. This means our design is violating the recommendations for RGMII. So far, the Ethernet port works …

May 5, 2020 · Solved: Hi, I want to use the RGMII interface for connecting a 100Mbps BroadR-Reach PHY. The PHY has its own 25MHz oszillator but no clock output.

Dec 23, 2024 · I am looking to interface 1Gbps Ethernet PHY to S32K358 through RGMII. On searching for pins to map for the interface I found that in IO signal table only 2 Tx and 2 Rx pin options are …

Sep 14, 2017 · Hi One query on Clock: 1) How TXC and RXC is connected for MAC to MAC (i.e. either TXC to RXC or TXC to TXC and RXC to TXC). 2) Only single oscillator can be used to generate 125 …

Jan 16, 2025 · I am working on a imx8mp based custom board. I am using single ethernet of eqos port and KSZ9131 ethernet Phy. I have disabled feos and configured eqos RGMI interface as per our …

Sep 17, 2025 · HELLO NXP TEAM: I am currently using the S32K388EVB_Q289 development board and debugging the RGMII communication of GMAC0. Some packets sent out by the TJA1120 can be …